The present disclosure relates to a multi-layer ceramic capacitor including side margins.
In recent years, along with miniaturization of electronic devices and achievement of high performance thereof, there have been increasingly strong demands for miniaturization and increase in capacitance with respect to multi-layer ceramic capacitors used in the electronic devices. In order to meet those demands, it is effective to enlarge internal electrodes of the multi-layer ceramic capacitor. In order to enlarge the internal electrodes, it is necessary to thin side margins for ensuring insulation properties of the periphery of the internal electrodes.
Meanwhile, in a general method of producing a multi-layer ceramic capacitor, it is difficult to form side margins having a uniform thickness because of precision in each step (e.g., patterning of internal electrodes, cutting of a multi-layer sheet, etc.). Therefore, in such a method of producing a multi-layer ceramic capacitor, as the side margins are made thinner, it is more difficult to ensure insulation properties of the periphery of the internal electrodes.
Japanese Patent Application Laid-open No. 2012-209539 discloses a technique of providing side margins in a later step. In other words, in this technique, in a green chip in which internal electrodes are exposed at the side surfaces, a side surface of the green chip is pressed against a ceramic green sheet. In such a manner, the ceramic green sheet for side surfaces is punched, and ceramic protective layers (side margins) are thus provided. This technique enables side margins having a uniform thickness to be formed and thus enables insulation properties of the periphery of the internal electrodes to be ensured also when the side margins are made thin.